Cadence 数字设计实现（DDI）系统 23.11.000 | 26.8 Gb
楷登电子科技公司（Cadence Design Systems, Inc.）作为全球电子设计创新领军者，正式发布Cadence 数字设计实现（DDI）系统 23.10.000。该套件通过三款产品的集成安装，助力用户轻松调用创新功能。
版本更新亮点
在过去多个版本迭代中，Genus 综合解决方案、Joules RTL 设计工作室与 Innovus 实现系统通过iSpatial、物理重构、电源回演、智能XOR等功能不断加强协同效能。
数字设计实现（DDI）系统采用三款产品集成安装方案，简化用户高级功能调用流程。历次版本持续增强Genus综合解决方案、Joules与Innovus实现系统的互操作性，融合包括iSpatial、物理重构、电源回演、智能XOR等创新功能。
Innovus 实现系统（INNOVUS）作为大规模并行物理实现平台，助力工程师在加速产品上市周期的同时，实现具有竞争力的功耗、性能与面积（PPA）目标。该工具隶属于支持Cadence”系统设计赋能”战略的数字设计平台体系，赋能系统与半导体企业高效开发差异化的终端产品。
Genus综合解决方案（GENUS）是新一代RTL与物理综合工具，其RTL设计效率提升高达10倍，周转时间缩短至1/5，可支持千万级单元的平面化设计容量，并实现时序与线长精度控制在5%以内的布署相关性。应用该方案可实现模块级与单元级综合迭代次数减少50%以上，数据通路面积缩减达20%且不影响性能表现。
在架构探索阶段精确评估RTL功耗始终是SoC设计团队的核心挑战。另一难题在于从RTL到布局布线（P&R）的设计进程中保持功耗测算的一致性，因其涉及不同阶段工具的切换。系统级验证工具虽能执行实际应用场景分析，但常与RTL转门级网表的实现工具存在脱节。
Cadence Joules RTL功耗解决方案（JOULES）通过时域级RTL功耗分析技术，集成系统级运行时容量与基于量产实现技术的门线精准预估，有效弥合此间隙。该方案与Palladium硬件仿真平台及Stratus高层次综合（HLS）平台无缝对接，支撑早期系统级2.0%精度功耗分析与优化，并通过Genus解决方案集成实现动态能效精准测算。
楷登电子作为电子设计与计算科学的领军者，依托”智能系统设计”战略将设计构想转化为现实。公司客户涵盖全球最具创新力的科技企业，助其在瞬息万变的市场中推出从芯片到板卡再到系统的革命性电子产品。
开发商: Cadence
软件名称: 数字设计实现（DDI）系统
版本: 23.11.000-ISR1 热修复补丁*
支持架构: x86_64
官方主页: CADENCE
Cadence Digital Design Implementation (DDI) System 23.11.000 | 26.8 Gb
Cadence Design Systems, Inc. , the leader in global electronic design innovation, has unveiledCadence Digital Design Implementation (DDI) System 23.10.000. This suite provides a single installation of the three products to enable users to utilize new features easily.
What’s New in This Release
Over the past few releases, the interoperability between Genus Synthesis Solution , Joules RTL Design Studio , and Innovus Implementation System has been increasing with features like iSpatial,Physical Restructuring, Power Replay, Smart XOR, and so on.
Digital Design Implementation (DDI) System provides a single installation of the three products to enable users to utilize advance features easily. Over the past few releases, the interoperability between Genus Synthesis Solution, Joules, and Innovus Implementation System has been increasing with features like iSpatial, Physical Restructuring, Power Replay, Smart XOR, and so on.
The Innovus Implementation System (INNOVUS) is a massively parallel physical implementation system that enables engineers to deliver high-quality designs with competitive power, performance and area (PPA) targets while accelerating time to market. It is a part of the Cadence digital design platform that supports the company’s overall System Design Enablement strategy, which enables system and semiconductor companies to create complete, differentiated end products more efficiently.
The Genus Synthesis Solution (GENUS) is a next-generation RTL synthesis and physical synthesis tool that delivers an up to 10X boost in RTL design productivity with up to 5X faster turnaround times. The solution can scale its capacity to well beyond 10 million instances flat. It also delivers tight timing and wirelength correlation to within 5% of place and route. Using the Genus Synthesis Solution, you can experience a 2X or more reduction in iterations between block-level and unit-level synthesis. In addition, you can achieve an up to 20% reduction in datapath area without any impact on performance.
Getting an accurate measure of RTL power consumption during design exploration has long been a major challenge for SoC design teams. Another challenge is getting consistent power through the design progress from RTL to P&R, because different tools are used at different stages of the design. System-level verification tools have the capacity to exercise real use cases but they are disconnected from the implementation tools that translate RTL to gates and wires.
The Cadence Joules RTL Power Solution (JOULES) closes this gap by delivering timebased RTL power analysis with system-level runtimes and capacity, as well as high-quality estimates of gates and wires based on production implementation technology. The Joules RTL Power Solution integrates seamlessly with the Cadence Palladium emulation platforms and the Stratus High-Level Synthesis (HLS) platform for early system-level power 2.0% analysis and optimization. The Cadence Genus Synthesis Solution integrates the Joules solution for accurate power analysis and unrivaled dynamic power efficiency results.
Cadence is a pivotal leader in electronic design and computational expertise, using its Intelligent System Design strategy to turn design concepts into reality. Cadence customers are the world’s most creative and innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications.
Owner: Cadence
Product Name: Digital Design Implementation (DDI) System
Version: 23.11.000-ISR1 Hotfix *
Supported Architectures: x86_64
Languages Supported: english
System Requirements: Linux **
Size: 26.8 Gb
* included:
Products in DDI 23.1
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Product Executable Version
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INNOVUS innovus 23.11-s109_1
GENUS genus 23.11-s100_1
